ABB 83SR04 module

ABB 83SR04 module

Basic information

83SR04 is a module for storing program binary and analog control tasks at the driver, group, and unit control levels, which can be used in conjunction with a multifunctional processing station. The model number is 83SR04-E/R1210, and the order number is GJR2390200R1210. It is produced by ABB Utilities GmbH. Its country of origin and other information are not explicitly mentioned. It weighs approximately 0.55kg and complies with DIN 41612 standard. The board size is 6 units, 1 partition, 160mm deep, equipped with 1 48 pin edge connector (X11 for station bus connection) and 1 32 pin edge connector (X21 for process connection).

Application scenarios

This module has a wide range of applications and can be used for driving control of unidirectional drivers, actuators, solenoid valves, binary function group control (sequence and logic control), three-step control, and signal conditioning.

Functional Features

Core functions

It has three operation modes, namely binary control mode (and analog basic function), analog control mode (and binary control), and signal conditioning mode (with interference bit output), which can be selected through the function block TXT1.

Having four hardware interfaces with switch devices and processes, it can achieve communication with processes and switch devices, receive and process relevant signals, and output control instructions.

The module address is automatically set by inserting the module into the PROCOTROL station. Telegrams received through the station bus are checked for transmission accuracy using parity bits, and telegrams sent by the module to the bus are also checked for transmission accuracy using parity bits.

The user program is stored in non-volatile memory (EEPROM) and can be loaded and modified from PDDS through the bus. After loading a valid user list, the module can run.

Diagnostic and alarm functions

The front of the module indicates faults through light-emitting diodes (LEDs), the ST indicator light displays any faults in the module and data communication with the module, and the SG indicator light only displays module faults.

The alarm system and control diagnostic system (CDS) receive fault alarms from the control module through the bus.

The module processing part will perform error monitoring (self diagnosis) on input telegrams, generated telegrams to be transmitted, and internal signal processing. The fault type will be stored in the diagnostic register, and a general fault alarm will be sent to the PROCOTROL system. When requested, telegrams with data from the diagnostic register will be transmitted.

Module Design

Component

It mainly consists of process interfaces, station bus interfaces, and processing parts. The process interface adapts the process signal to the internal signal level of the module; The station bus interface adapts module signals to bus signals, mainly involving parallel to serial conversion; The processing part is equipped with a microprocessor, which works in conjunction with multiple storage areas through the internal bus of the module, including EPROM (storing operating programs, functional blocks), EEPROM (storing user programs, etc.), RAM (storing user programs, historical values, current module input and output signals, etc.).

Structuring and Addressing

When structuring, module inputs and outputs need to be assigned to neutral inputs and outputs of each functional block, or constants, parameters, or outputs of other functional blocks need to be specified for functional block inputs, and there are many limiting values that need to be followed, such as a maximum module input of 287 and a maximum imitable module input of 32.

The signal exchange between the module and the bus system is carried out through shared memory, which includes source registers (0-63) for transmitting telegrams and destination registers (64-199) for receiving telegrams. The allocation of module input and output signals to shared memory registers is determined by PDDS based on user provided data, including module input address list, module output to bus address list, etc.

MODE

Binary Control Mode (STR)

Provide functional blocks for all binary control functions at the driver, group, and unit control levels, as well as additional analog basic functions.

The module cycle time is variable and strictly determined by the functional blocks used. In this mode, except for the output of the GRE function block, analog values do not transmit interference bits.

Simulated Control Mode (REG)

Provide simulation control function blocks for all single variables and main controls, including drive control function blocks.

The module cycle time can be preset in steps to a fixed minimum time (50, 100, 150, 200, or 250ms). When implementing multiple control loops, the module cycle time will increase accordingly.