ADLINK PCIe CPL64V PCIe Gen3 x4 specification Camera Link image acquisition card

ADLINK PCIe CPL64V PCIe Gen3 x4 specification Camera Link image acquisition card

Product Overview and Core Specifications

Main functional features

Bus: PCIe Gen3 x4; The maximum aggregated image bandwidth is 850 MB/s; Camera Link pixel clock 20-85 MHz.

Camera Link mode: supports Base, Medium, Full (80 bit); Single card, single channel, with 2 SDR interfaces to achieve different modes.

Onboard memory: 512MB DDR image cache.

Isolation IO (isolation voltage 500 Vrms)

4-channel isolated DI/trigger input, up to 10 kHz;

4-channel isolated open drain DO/strobe Strobe output, up to 500 kHz;

1 set of A/B differential isolation encoder input; Supports X1/X2/X4 frequency doubling, CW/CCW, OUT/DIR modes; The maximum frequency for 4x mode is 20 MHz.

PoCL: Each SDR interface outputs PoCL+12V, up to 0.8A, with overcurrent protection and automatic recognition of PoCL/regular camera cables.

Multi card synchronization: Up to 4 cards can be interconnected, and through a dedicated synchronization interface, the synchronization delay between multiple cameras is less than 100 ns, with a one master, multiple slave architecture.

Operating system: Only supports Windows 10/11 64 bit; Development languages C++, C #, VB.net; Supporting tool CamCreator.

Support camera types: Area Scan, Line Scan; Supports 1/2/4/8/10 Tap pixel output, with multiple bit depths of Mono/Bayer/RGB.

Machinery and Environment

Size: 130mm × 111.28mm;

Working temperature: 0-60 ℃; Humidity 5-90% without condensation;

Certification: CE, FCC Class-A, EN 61000-6-4.

Typical Applications

Line scanning detection, 3D imaging, stereoscopic vision, high-speed defect detection AOI, high-resolution industrial vision.

Important restriction: Cannot be installed on the same computer as the old version PCIe CPL64, and the old version SDK driver needs to be completely uninstalled; Windows kernel DMA protection is not supported; UAC needs to be turned off; System energy-saving mode is not supported.

Hardware interface, dialing, indicator lights

On board connector

CN5 (SDR) - Camera Link Base: Base mode video input;

CN6 (SDR) - Camera Link Medium/Full: Medium/Full mode video input;

CN2 (D-SUB26): Composite IO interface: 4-channel isolated DI, 4-channel isolated DO, A/B differential encoder;

CN4 (2 × 5P Box Header) multi card synchronization interface: Connect a dedicated synchronization cable between the master and slave cards;

SW1:4 DIP Card ID DIP: For multi card system settings, the card number must be 0-15, and each card ID must be unique.

LED status indicator light

LED7 (Camera Link status)

Full camera: always on green; Medium: 2Hz flashing green; Base: Constant bright orange; Exception: 2Hz flashing orange; Undetected camera: turned off;

Collection status: Starting to collect normally bright green, flashing green at 2Hz during collection, stopping collection and turning off.

LED2 (multi card synchronization): The main card is always red and on; Turn off the card.

IO Electrical Key Points

Encoder EA/EB differential input: optocoupler isolation, common mode voltage ± 7V;

DI isolated input: 0-24V, high level 3-24V, low level 0-0.8V, supports debounce filtering;

DO isolated open drain output: maximum 30V, single channel maximum 80mA current, no built-in pull-up, external self configured pull-up.

Hardware and driver installation process

Hardware installation: Power off, insert PCIe Gen3 x4/x8/x16 slot into the host, lock the cover, connect Camera Link camera cable, IO cable, and multi card synchronization cable.

Installation of ADLINK Vision Software AVS SDK

Dependency NET Framework 4.0 (4.8 recommended), VC++2015 runtime library;

Run Setup, go to Next, select the installation path, and restart the computer after completion.

Device Manager Verification: Identify ADLINK PCIe CPL64V Full Multi functional Adapter and generate corresponding virtual COM port (camera serial port).

System setting mandatory requirement: Windows 10/11 needs to set UAC to the lowest level of "never notify", otherwise the function will be abnormal; Turn off system sleep/energy saving; Turn off kernel DMA protection.

Trigger architecture (core hardware functionality)

The FPGA inside the board implements a complete programmable trigger link, which can be used for line scan camera encoder triggering, delay triggering, and multiple re triggering.

Trigger source MUX multiplexer: 7 types of trigger sources available: DI0-DI3, encoder comparison event, software trigger, multi card synchronous input; Each DO, CC1, CC2 can independently select a trigger source.

Trigger delay module

Two modes: Timer mode (unit: μ s); Encoder mode (encoder count value);

It can output pulses with time/position delay, suitable for sensors to detect objects and then take photos after walking a certain distance.

Re trigger module

After receiving a trigger source, automatically output N consecutive trigger pulses;

The interval can be time (μ s) or encoder steps;

When TriggerNums=0, it represents infinite loop output, typically used for continuous line scanning.

Output modules (DO0-DO3, CC1/CC2)

Manual mode: The software directly controls the voltage level;

Trigger mode: Upon receiving a trigger event, the output can be configured with high and low pulse width PWM;

Multi card synchronization mechanism: one Master card and the remaining Slave cards; Distribute synchronization events through CN4 synchronization cable; Multi camera synchronization delay<100 ns.

All triggering related functions must be activated by calling AVS-FrameGrabberStartAcquire() to start the collection process.

CAM Camera Configuration INI File

cam is an INI format camera configuration file, and the AVS SDK loads the cam file to complete all board and camera parameter configurations; After installation, the template is stored in C: Program Files ADLINK AVS CameraFile.

Main configuration segments:

[ImageFormat] Image format: Sensor width and height, Tap count (1-10Tap), pixel depth, Tap layout, FVAL/LVAL/DVAL frame/row/data effective signal polarity; Please note that there is a pixel alignment constraint on the width of the image, and setting it incorrectly will trigger the acquisition error.

[Capture Mode] Acquisition Mode: AreaScan Area Scan/LineScan Line Scan.

[TriggerInput] Trigger input: DI polarity, encoder polarity, input debounce time (ns).

[TriggerOutputTrigSrc] Trigger output source: Specify the trigger source for each DO, CC1, CC2 channel.

[Encoder Input] Encoder configuration: multiplier mode X1/X2/X4, compare count values.

[MultiCardSync] Multi card synchronization: Select Master master card/Slave slave card.

[TriggerDelay] Trigger Delay: Each output independently sets the delay mode and delay count.

Re trigger: Enable re trigger, mode, interval, and number of output pulses.

[TriggerOutput] DO output pulse parameters: polarity, high and low pulse width, manual/trigger mode.

[CameraControl] CC1/CC2 Camera Control Pulse: Camera External Trigger Pulse Configuration.

[PoCL] PoCL power supply timing tolerance parameters: clock start, drop, voltage drop tolerance time.

5 typical application examples

Single external trigger acquisition of array: External DI triggers once and takes one picture.

Array delay triggered acquisition: DI detects objects and takes photos after a delay time divided by the number of encoder steps.

Line scan infinite continuous scanning: triggered by the encoder, set the number of re triggers to 0, and continuously output line triggers.

Line scan fixed length page acquisition: External DI triggers once, automatically outputs N rows of pulses to acquire a whole line scan image.

Line scanning with delayed fixed length page acquisition: The sensor detects the object, and after the object moves N encoder pulses, it outputs N rows of triggers.

Two modes of software development collection

Block frame AVS_SrameGrabberGetFrame(): Do not place business processing on the collection thread to avoid frame loss; DMA ring buffer, call AVS-FrameGrabberQueueBuffer() to return the cache.

Callback mode AVS_SrameGrabberSetcallbacks: Frame ready callback notification; Cannot mix GetFrame and callback interfaces.

Status parameters

A large number of readable state register addresses inside FPGA are used for debugging, statistics, and troubleshooting:

Encoder count value, DI/DO status;

Counting of various triggering events (DI events, encoder comparisons, software triggers, multi card synchronization events);

Trigger delay buffer count and overflow flag (DelayBufferOverflow, non-zero represents event loss);

Frame count, line count, DMA interrupt count;

Camera Link working mode (Base/Medium/Full/Abnormal), camera clock frequency;

PoCL power safety status.

DropCount is not zero, indicating that the triggering event is lost, and system bandwidth/triggering logic needs to be optimized.

CamCreator graphic debugging tool

Supporting visual debugging software, used for hardware verification, CAM file editing, image preview, without the need to write code.

Main panel:

Devices panel: Identify all PCIe CPL64V cards on the device and select the activation channel; Pay attention to CardID settings for multiple cards; Only one channel is activated at the same time.

Camera Panel: Load template cam files and support user-defined cam configuration.

Parameters panel: Modify image, trigger, encoder, and multi card synchronization parameters. The modifications take effect in real-time and can be saved as a cam file.

Toolbar: Continuous acquisition, single frame, scaling, Bayer decoding.

Display Image Display Window: Displays the captured image and supports frame selection for zooming in and out.

Status bar: cursor pixels, frame rate, total frame rate, transfer rate; Bottom hardware status line: CameraLink mode, clock frequency, data stream status, PoCL status, line/frame counter.

Tools menu: Read all IO, encoders, trigger event statistics counters.

Firmware upgrade process

Run the installation directory FirmwareUpdating. exe upgrade tool;

Scan the device, select the target board, and choose the. bin firmware file;

Execute upgrade; The upgrade must be completed with a cold restart (power off and then power on), and a hot restart is invalid.

Safety instructions and technical support

Disassembling and assembling hardware must be powered off; Indoor use of equipment, with an altitude of up to 2000 meters; It is prohibited to disassemble and repair the machine by oneself.

Provide global technical support, document copyright 2026 ADLINK; The product complies with RoHS and WEEE.

Comparison Table of Key Differences with the Old PCIe CPL64

Project PCIe CPL64 (old) PCIe CPL64V (new)

PCIe version Gen2 x4 Gen3 x4, significantly increased bandwidth

Camera Link highest specification Medium Base/Medium/Full 80 bit

Onboard memory 128 MB 512 MB

IO non isolated TTL 500Vrms optocoupler isolated DI/DO

Encoder up to 1 MHz up to 20 MHz (4x)

Multi card synchronization does not support up to 4 cards, with a synchronization delay of less than 100 ns

PoCL 1A 0.8A per channel

Operating System XP/Vista Win10/11-64 bit

SDK DASK CPL64 SDK, brand new AVS SDK, cannot mix old drivers