GE IC698CHS009 RX7i 9 VME Slot Rack, Rear Mount
The Bus Controller handles all data transfer between the PLC and the devices on its bus.
In order to do this, the Bus Controller must interface two completely separate and
asynchronous activities:
A. The Genius bus scan, a cycle of communications between the devices on a bus (in cluding the Bus Controller itself). The cycle follows the order of Bus Addresses
(0–31).
B. The CPU sweep, the cycle of actions that includes communications between the
CPU and the Bus Controller.
The Bus Controller manages data transfer between the bus and the CPU by maintaining
two separate on–board RAM memories. One interfaces with the bus and the other in terfaces with the CPU. The Bus Controller automatically transfers data between these
two memories, making data available to the bus or to the CPU when it is needed.
The Genius Bus Scan
A bus scan consists of one complete rotation of a “token” among the devices on the bus
As mentioned earlier, these devices may include other Bus Controllers, or Remote I/O
Scanners, in addition to (or instead of) the Genius blocks illustrated above.
During a bus scan, the Bus Controller automatically:
Receives all input data that has been sent by devices on the bus.
Broadcasts Global Data.
Updates outputs, as permitted, to the devices on the bus. Transmission of outputs
from the Bus Controller can be disabled for one or more devices on the bus.
Receives any fault messages issued by devices on the bus and sets diagnostic status
references for use by the CPU.
Sends a single command received from the CPU (for example, Clear Circuit Faults)
to the appropriate devices.
The amount of time it takes for the communications token to pass to all devices depends
on the baud rate, the number and types of devices on the bus, and the use of Global
Data and datagram communications

The Bus Controller receives input data from each input block, I/O block, and remote
drop each time the block or Remote I/O Scanner has the communications token.
(Because this data is broadcast, it may be received by any other bus interface module operating on the bus).
INPUTS
FROM BLOCK 4
1 2 3 4
BUS
CONTROLLER
a43559
= TOKEN
The Bus Controller stores all the input data it receives. Once per CPU sweep, the CPU
reads all discrete and analog inputs from the Bus Controller. (Analog data is not multiplexed).
Output Data from the CPU
As the application program executes, the CPU sends outputs and any commands to the
Bus Controller. The Bus Controller stores this data, transmitting it on the bus each time
it has the communications token. Unlike inputs, which are broadcast, outputs are directed to the specific device that should receive them.
BUS
CONTROLLER
HAS
TOKEN
1 2 3 4
BUS
CONTROLLER
a43557
OUTPUTS PLC CPU
READS STORED INPUTS
STORES NEW OUTPUTS
TOKEN
Outputs for 4 Input/2 Output Analog Blocks
Four words of %AQ memory are assigned to a 4 Input/2 Output block by the configuration software.
The CPU stores the output data as shown below. Locations “n+2” and
“n+3” are not used by the block.