K-WANG
GE VMIVME-9064/32 Reflective Memory Intelligent I/O Controller
GE VMIVME-9064/32 Reflective Memory Intelligent I/O Controller
Functional Characteristics
Introduction: The VMIVME-9064/32 provides a flexible, compact solution including user-friendly software utilities for the user who requires I/O products coupled with a preprogrammed SBC for effective turnkey operation. It is designed to operate with Abaco Embedded Systems Reflective Memory (RM) products. VMIVME-9064/32 may reside on multiple nodes of a single RM link.
Features:
• 68040 single board computer (SBC) with 16 MB of shared DRAM, 32-bit wide, accessible from the VMEbus
- System controller functions with full four-level arbiter
- Front panel run-and-halt and fall status LEDs
- Front panel reset and abort switches
• Firmware provides all required support for scanning inputs, updating outputs, EU and data-type conversions, fault detection, fault isolation, and error reporting
• Requires Abaco Reflective Memory (VMIVME-5550, -5565, -5576, or -5588)
• Optional host software support utilities
- I/O point manager
- Report generator
- Configuration downloader
- Real time interface software
- Source code available in C
• Supports a wide variety of Abaco Built-in-Test I/O modules (BITMODULES™)
• Optional CRT-based control panel
• Low cost expansion
VMIVME-9064/32 — IIOC Firmware1:
• Diagnostic firmware
- Processor
- Local memory
- Global memory
- Local diagnostic control
- Error reporting
- Offline and real time fault detection and isolation
• Diagnostic control
- Power up initialization
- Host initiated (from customer-furnished host computer)
- Local terminal control
• Failure reporting
- Front panel fail LEDs
- Local terminal option
- Host report (to VMEbus host)
• Real time firmware
- Floating-point to fixed-point conversion
- Fixed-point to floating-point conversion - Bit-to-byte conversion
- Byte-to-bit conversion
- I/O data transfers
- Real time fault detection
- Synchro smoothing
- Analog output smoothing
- Analog input filtering
VMIVME-9064/32 — Required:
1. 68040 SBC
2. 20-slot VMEbus chassis assembly
3.Reflective Memory host interface, one of options 2 through 5 from the option list below
Software Communications Protocol:
The VMIVME-9064/32 IIOC communications protocol utilizes a simple, memory-mapped control window and interrupt scheme to simplify control by the RM host computer. The host initializes a memory-mapped RM allocation page and interrupts each VMIVME-9064/32 IIOC on the RM link. Each IIOC uses its node number, read from the local RM board, as an index into the RM allocation page to locate its control window and buffer space. The host may then write commands for the IIOC to the appropriate control window and issue a command interrupt. The IIOC fields the locally generated interrupt, interprets the command, and executes the requested action. After I/O configuration, the IIOC posts the locations and word counts of the configured I/O buffers in the control window. The host and IIOC then read and write I/O data to these shared RM buffers.
Command List Processing:
The VMIVME-906x IIOCs provide for command list processing to reduce or eliminate host command interaction during real time processing. These command lists are configured after the host has configured all I/O scan lists. Up to three command lists are supported by the embedded host IIOCs. These lists contain the scan commands, with associated data transfer addresses that would be utilized during a real time frame. Each command list may contain only one scan command for each of the twelve supported scan list types (that is, primary DO, secondary DO, primary AI, etc.). Each of the configured command lists may be executed with a single command each I/O frame, or may be configured with an execution interval which allows the host to command autoscanning of each list at the execution interval provided with the command list configuration data. Command lists may not contain digital input scan commands when VMIVME-1110 digital input boards with the 5 ms filter option are present in the IIOC.
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