K-WANG
GE VMIVME-5620 Intelligent HSD Emulator
GE VMIVME-5620 Intelligent HSD Emulator
DESCRIPTION
The VMIVME-5620 is an Encore HSD-compatible HSD emulator implemented on a double Eurocard. Two flat 50-conductor cables with socket connectors at both ends connect the VMIVME-5620 to the Encore HSD/IBL Interface or other HSD-compatible device.The VMIVME-5620 uses an integrated VMEbus interface (Cypress VIC068), and an on-board local bus with processor and memory that interprets lists (IOCL) of host-based I/O Control Blocks (IOCBs). The VMEbus interface provides variable width host global memory access, and interrupts to the host interrupt handler. Figure 1 is a block diagram of the VMIVME-5620.
FEATURES
• High-performance HSD interface designed to minimize host software overhead
• Executes commands from lists in memory
• IBL compatibility high or low priority
• HSD external mode support
• Data buffering (FIFOs)
• Data chaining and command chaining
• 68020 microprocessor
• Block transfers
• 32-bit DMA transfers over HSD bus
• 4 Mbyte/s transfer rate (VMIVME-5620 to VMIVME-5620)
• Programmable VMEbus address modifiers (as master)
• Programmable interrupt vectors and level
• HSD compatibility as HSD master or HSD slave
• VMEbus compatible (ANSI/IEEE STD 1014 - 1987 IEC 821 and 297)
• MA32: MBLT32 as VME master
• SAD024: SD32 as VMEbus slave
• VMEbus-to-VMEbus link using two boards
• 250-foot maximum cable length
• Front panel fail LED
• Jumper-selectable slave address
• Bus release: ROR, RWD, FAIR, RCLR
• Jumper-enabled system controller
HSD MASTER MODE
The VMIVME-5620 can operate in the HSD master mode, which is the mode used to drive HSD peripherals. It fully implements this mode, sending External Function Commands to the HSD peripheral device, receiving device status, and transferring data blocks to or from the device, all by interpreting an IOCL in VMEbus global memory. Further, it supports External Mode, in which the HSD peripheral device controls addressing and data transfers to or from VMEbus global memory.
INTERbus LINK (IBL) MODE
The VMIVME-5620 can operate in the INTERbus Link (IBL) mode. This mode permits two HSD-compatible controllers, one of which may be an Encore HSD controller, to form a high-speed link. The IBL mode reroutes some signals on the HSD interface so that a crossed cable is not necessary.
DATA FIFOs
Data FIFOs are provided so that data transfers on the VMEbus may take place asynchronously with the data transfers on the cable. The data FIFOs are 512 transfers deep (2,048 bytes).
PROGRAMMING CONSIDERATIONS
The VMIVME-5620 operates as both VMEbus master and slave. As a slave, the board receives setup parameters from the host CPU. These setup parameters are written into Control Registers and provide information such as: interrupt vectors, interrupt levels, and an address that points to a location in global memory which contains the Input Output Control Blocks (IOCBs).
TRANSFER SPECIFICATIONS
Maximum Block Size: 256 Kbyte (16-bit transfer counter)
Transfer Width: 32, 16, or 8 bits per HSD cycle
Transfer Mode: Bidirectional half-duplex
Address Counters: 32-bit
Command/Control: From list in memory, D32 or D16 or D8 (EO) DMA
I/O Cables: Two 50-conductor (twisted pair flat-ribbon) (Cables not included)
Maximum Cable Length: 250 ft
PHYSICAL/ENVIRONMENTAL
Temperature: 0 to 55 °C, operating -20 to 85 °C, storage
Humidity: 20 to 80 percent relative, noncondensing
Altitude: Operation to 10,000 ft
Dimensions: Double height Eurocard (6U) (160 mm x 233.35 mm)
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